LAHF Load Register AH from Flags
See also: SAHF, PUSHF, POPF
Flags: not altered
LAHF
Logic:
AH bitsßFlag-reg bits7 6 4 2 0
LAHF copies the five 8080/8085 flags (Sign, Zero, Auxiliary Carry, Parity, and Carry) into bits 7, 6, 4, 2, and 0, respectively, of the AH register. The flags themselves are unchanged by this instruction.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| no operands |
4 |
- |
1 |
LAHF |
This instruction is primarily used to provide upward compatibility between the 8080/8085 family and the 8086 family.Note:
After this instruction is executed, bits 1, 3 and 5 of AH are undefined.
LDS Load Pointer using DS
See also: LEA, LES, OFFSET, EA
Flags: not altered
LDS destination,source
Logic:
DS ß (source + 2)destination
LDS loads into two registers the 32-bit pointer variable found in memory at source. LDS stores the segment value (the higher order word of source) in DS and the offset value (the lower order word of source) in the destination register. The destination register may be any any 16-bit general register (that is, all registers except segment registers).
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| reg16, mem32 |
24+EA |
2 |
2-4 |
LDS DI,32_POINTER |
LES, Load Pointer Using ES, is a comparable instruction that loads the ES register rather than the DS register.Note:
LEA Load Effective Address
See Also: LDS, LES, OFFSET, EA
Flags: not altered
LEA destination,source
Logic:
destination ß Addr(source)
LEA transfers the offset of the source operand (rather than its value) to the destination operand. The source must be a memory reference, and the destination must be a 16-bit general register.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| reg16, mem16 |
2+EA |
- |
2-4 |
LEA BX,MEM_ADDR |
This instruction has an advantage over using the OFFSET operator with the MOV instruction, in that the source operand can be subscripted. For example, this is legal:Note:
LEA BX, TABLE[SI] ;Legal
whereas
MOV BX, OFFSET TABLE[SI] ;Not legal
is illegal, since the OFFSET operator performs its calculation at assembly time and this address is not known until run time.
The DOS print string routine, Function 09h, requires a pointer to the string to be printed in DS:DX. If the string you wished to print was at address "PRINT-ME" in the same data segment, you could load DS:DX with the required pointer using this instruction:Example:
LEA DX, PRINT-ME
LES Load Pointer using ES
See Also: LEA, LDS, OFFSET, EA
Flags: not altered
LES dest-reg,source
Logic: ES
ß (source)dest-reg
LES loads into two registers the 32-bit pointer variable found in memory at source. LES stores the segment value (the higher order word of source) in ES and the offset value (the lower order word of source) in the destination register. The destination register may be any any 16-bit general register (that is, all registers except segment registers).
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| reg16, mem32 |
24+EA |
2 |
2-4 |
LES DI, STR_ADDR |
LDS, Load Pointer Using DS, is a comparable instruction that loads the DS register rather than the ES register.Note:
LOCK Lock the Bus
See Also: HLT, WAIT, ESC
Flags: not altered
LOCK
LOCK is a one-byte prefix that can precede any instruction. LOCK causes the processor to assert its bus lock signal while the instruction that follows is executed. If the system is configured such that the LOCK signal is used, it prevents any external device or event from accessing the bus, including interrupts and DMA transfers.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| no operands |
2 |
- |
1 |
LOCK XCHG FLAG,AL |
This instruction was provided to support multiple processor systems with shared resources. In such a system, access to those resources is generally controlled via a software-hardware combination using semaphores.Note:
This instruction should only be used to prevent other bus masters from interrupting a data movement operation. This prefix should only be used with XCHG, MOV, and MOVS.
LODS Load String (Byte or Word)
See also: LODSB, LODSW, CMPS, MOVS, SCAS, STOS, REP, CLD
Flags: not altered
LODS source-str
Logic:
Accumulator ß (DS:SI)if DF = 0
SI
else
ß SI - nSI
LODS transfers the value (word or byte) pointed to by DS:SI into AX or AL.It also increments or decrements SI (depending on the state of the Direction Flag) to point to the next element.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
|
|
byte(word) |
|
|
|
| source-str |
12(16) |
- |
1 |
LODS LIST |
| (repeat) source-str |
9+13(17)/rep |
1/rep |
1 |
REP LODS LIST |
This instruction is always translated by the assembler into either LODSB, Load String Byte, or LODSW, Load String Word, depending upon whether source-str refers to a string of bytes or words. In either case, however, you must explicitly load the SI register with the offset of the string.Note:
Although it is legal to repeat this instruction, it is almost never done since doing so would continually overwrite the value in AL.
Example:
INIT_PORT:
DB '$CMD0000' ;The string we want to send
.
.
CLD ;Move forward through string at INIT_PORT
LEA SI,INIT_PORT ;SI gets starting address of string
MOV CX,8 ;CX is counter for LOOP instruction
AGAIN:
LODS INIT_PORT ;"INIT_PORT" is needed only by the
OUT 250,AL ;assembler, for determining word or byte
LOOP AGAIN
LODSB Load String Byte
See Also: LODS, LODSW, CMPS, MOVS, SCAS, STOS, REP, CLD, STD
Flags: not altered
LODSB
Logic:
AL ß (DS:SI)if DF = 0
SI
else
ß SI - 1SI
LODSB transfers the byte pointed to by DS:SI into AL and increments or decrements SI (depending on the state of the Direction Flag) to point to the next byte of the string.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| - |
12 |
- |
1 |
LODSB |
| (repeat) |
9+13/rep |
1/rep |
1 |
REP LODSB |
Although it is legal to repeat this instruction, it is almost never done since doing so would continually overwrite the value in AL.Note:
Example:
INIT_PORT:
DB '$CMD0000' ;The string we want to send
.
.
CLD ;Move forward through string at INIT_PORT
LEA SI, INIT_PORT ;SI gets starting address of string
MOV CX, 8 ;CX is counter for LOOP instruction
AGAIN:
LODSB ;Load a byte into AL...
OUT 250,AL ; ...and output it to the port.
LOOP AGAIN
LODSW Load String Word
See also: LODS, LODSB, CMPS, MOVS, SCAS, STOS, REP, CLD, STD
Flags: not altered
LODSW
Logic:
AX ß (DS:SI)if DF = 0
SI
else
ß SI - 2SI
LODSW transfers the word pointed to by DS:SI into AX and increments or decrements SI (depending on the state of the Direction Flag) to point to the next word of the string.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| - |
16 |
- |
1 |
LODSW |
| (repeat) |
9+17/rep |
1/rep |
1 |
REP LODSW |
Although it is legal to repeat this instruction, it is almost never done since doing so would continually overwrite the value in AL.Note:
Example:
INIT_PORT:
DB'$CMD0000' ;The string we want to send
.
.
CLD ;Move forward through string at INIT_PORT
LEA SI, INIT_PORT ;SI gets starting address of string
MOV CX, 4 ;Moving 4 words (8 bytes)
AGAIN:
LODSW ;Load a word into AX...
OUT 250,AX ; ...and output it to the port.
LOOP AGAIN
LOOP Loop on Count
See Also: LOOPE, LOOPNE, LOOPNZ, LOOPZ, JCXZ
Flags: not altered
LOOP short-label
Logic:
CX ß CX - 1If (CX <> 0)
JMP short-label
LOOP decrements CX by 1, then transfers control to short-label if CX is not 0.Short-label must be within -128 to +127 bytes of the next instruction.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| short-label |
17/5 |
- |
2 |
LOOP AGAIN |
LOOPE Loop While Equal
See also: LOOP, LOOPNE, LOOPNZ, LOOPZ, JCXZ
Flags: not altered
LOOPE short-label
Logic:
CX ß CX - 1If CX <> 0 and ZF = 1
JMP short-label
Used after a CMP or SUB, LOOPE decrements CX by 1, then transfers control to short-label if the first operand of the CMP or SUB is equal to the second operand. Short-label must be within -128 to +127 bytes of the next instruction.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| short-label |
18 or 6 |
- |
2 |
LOOPE AGAIN |
LOOPZ, Loop if Zero, is the same instruction.Note:
LOOPNE Loop While not Equal
See also: LOOPZ, LOOP, LOOPE, LOOPNZ, JCXZ
Flags: not altered
LOOPNE short-label
Logic:
CX ß CX - 1If CX <> 0 and ZF = 0
JMP short-label
Used after a CMP or SUB, LOOPNE decrements CX by 1, then transfers control to short-label if the first operand of the CMP or SUB is not equal to the second operand. Short-label must be within -128 to +127 bytes of the next instruction.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| short-label |
19 or 5 |
- |
2 |
LOOPNE AGAIN |
LOOPNZ, Loop While Not Zero, is the same instruction.Note:
LOOPNZ Loop While not Zero
See Also: LOOPNE, LOOP, LOOPE, JCXZ
Flags: not altered
LOOPNZ short-label
LOOPNZ is a synonym for LOOPNE. See the description for LOOPNE.
LOOPZ Loop While Zero
See also: LOOPE, LOOP, LOOPNE, JCXZ
Flags: not altered
LOOPZ short-label
LOOPZ is a synonym for LOOPE. See the description for LOOPE.
MOV Move (Byte or Word)
See also: MOVSPUSHPOPXCHGXLATEA
Flags: not altered
MOV destination,source
Logic:
destination ß source
MOV copies a byte or word from the source into the destination.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
|
|
byte(word) |
|
|
|
| register, register |
2 |
- |
2 |
MOV BX,CX |
| memory, accumulator |
10(14) |
1 |
3 |
MOV MEM_DEST,AL |
| accumulator, memory |
10(14) |
1 |
3 |
MOV AX,MEM_SOURCE |
| memory, register |
9(13)+EA |
1 |
2-4 |
MOV MEM_DEST,BX |
| register, memory |
8(12)+EA |
1 |
2-4 |
MOV BX,MEM_SOURCE |
| register, immediate |
4 |
- |
2-3 |
MOV BX,0F6CDh |
| memory, immediate |
10(14)+EA |
1 |
3-6 |
MOV MASK,0F6CDh |
| seg-reg, reg16 |
2 |
- |
2 |
MOV DS,BX |
| seg-reg, mem16 |
8(12)+EA |
1 |
2-4 |
MOV DS,SEGMENT_VAL |
| reg16, seg-reg |
2 |
- |
2 |
MOV BP,SS |
| memory, seg-reg |
9(13)+EA |
1 |
2-4 |
MOV CODE_VAR,CS |
MOVS Move String (Byte or Word)
See Also: MOV, MOVSB, MOVSW, CMPS, LODS, SCAS, STOS, REP, CLD, STD
Flags: not altered
MOVS destination-string,source-string
Logic:
(ES:DI) ß (DS:SI)if DF = 0
SI
ß DI + nDI
else
ß SI - nSI
ß DI - nDI
This instruction copies the byte or word pointed to by DS:SI, into the location pointed to by ES:DI. After the move, SI and DI are incremented (if the direction flag is cleared) or decremented (if the direction flag is set), to point to the next element of the string.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
|
|
byte(word) |
|
|
|
| dest,source |
18(26) |
2 |
1 |
MOVS WORD_BUFF,INPUT |
| (repeat) dest,source |
9+17(25)/rep |
2/rep |
1 |
REP MOVSW |
This instruction is always translated by the assembler into either MOVSB, Move String Byte; or MOVSW, Move String Word, depending upon whether source-string refers to a string of bytes or words. In either case, you must explicitly load the SI and DI registers with the offset of the source and destination strings.Note:
Example:
BUFFFER1DB100 DUP (?)
the following example moves 100 bytes from BUFFER1 to BUFFER2:
CLD ;Move in the forward direction
LEA SI, BUFFER1 ;Source address to SI
LEA DI, BUFFER2 ;Destination address to DI
MOV CX,100 ;CX is used by the REP prefix
REP MOVSBUFFER2, BUFFER1 ;...and MOVS it.
MOVSB Move String Byte
See Also: MOV, MOVS, MOVSW, CMPS, LODS, SCAS, STOS, REP, CLD, STD
Flags: not altered
MOVSB
Logic:
(ES:DI) ß (DS:SI)if DF = 0
SI
ß DI + 1DI
else
ß SI - 1SI
ß DI - 1DI
This instruction copies the byte pointed to by DS:SI into the location pointed to by ES:DI. After the move, SI and DI are incremented (if the direction flag is cleared) or decremented (if the direction flag is set), to point to the next byte.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| - |
18 |
2 |
1 |
MOVSB |
| (repeat) |
9+17/rep |
2/rep |
1 |
REP MOVSB |
Example:
BUFFFER1DB100 DUP (?)
the following example moves 100 bytes from BUFFER1 to BUFFER2:
CLD ;Move in the forward direction
LEA SI, BUFFER1 ;Source address to SI
LEA DI, BUFFER2 ;Destination address to DI
MOV CX,100 ;CX is used by the REP prefix
REP MOVSB ;...and move it.
MOVSW Move String Word
See also: MOV, MOVS, MOVSB, CMPS, LODS, SCAS, STOS, REP, CLD, STD
Flags: not altered
MOVSW
Logic:
(ES:DI) ß (DS:SI)if DF = 0
SI
ß DI + 2DI
else
ß SI - 2SI
ß DI - 2DI
This instruction copies the word pointed to by DS:SI to the location pointed to by ES:DI. After the move, SI and DI are incremented (if the direction flag is cleared) or decremented (if the direction flag is set), to point to the next word.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| - |
26 |
2 |
1 |
MOVSW |
| (repeat) |
9+25/rep |
2/rep |
1 |
REP MOVSW |
Example:
BUFFFER1DB100 DUP (?)
the following example moves 50 words (100 bytes) from BUFFER1 to BUFFER2:
CLD ;Move in the forward direction
LEA SI, BUFFER1 ;Source address to SI
LEA DI, BUFFER2 ;Destination address to DI
MOV CX,50 ;Used by REP; moving 50 words
REP MOVSW ;...and move it.
MUL Multiply, Unsigned
See Also: IMUL, AAM, EA, Flags
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
* |
|
|
|
? |
? |
? |
? |
* |
MUL source
Logic:
AX ß source * AL ;if source is a byteor
DX:AX = source * AX ;if source is a word
MUL performs unsigned multiplication. If source is a byte, MUL multiplies source by AL, returning the product in AX. If source is a word, MUL multiplies source by AX, returning the product in DX:AX. The Carry and Overflow flags are set if the upper half of the result (AH for a byte source, DX for a word source) contains any significant digits of the product, otherwise they are cleared.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| reg8 |
70-77 |
- |
2 |
MUL CH |
| reg16 |
118-133 |
- |
2 |
MUL BX |
| mem8 |
(76-83)+EA |
1 |
2-4 |
MUL A_BYTE |
| mem16 |
(128-143)+EA |
1 |
2-4 |
MUL A_WORD |
NEG Negate
See also: NOT, SUB, SBB, AAS, DAS, EA, Flags
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
* |
|
|
|
* |
* |
* |
* |
* |
NEG destination
Logic:
destination ß -destination ; two's complement
NEG subtracts the destination operand from 0 and returns the result in the destination. This effectively produces the two's complement of the operand. The operand may be a byte or a word.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
|
|
byte(word) |
|
|
|
| register |
3 |
- |
2 |
NEG DL |
| memory |
16(24)+EA |
2 |
2-4 |
NEG COEFFICIENT |
If the operand is zero, the carry flag is cleared; in all other cases, the carry flag is set.Note:
Attempting to negate a byte containing -128 or a word containing -32,768 causes no change to the operand and sets the Overflow Flag.
NOP No Operation
Flags: not altered
Logic: None
NOP causes the processor to do nothing. This instruction is frequently used for timing purposes, to force memory alignment, and as a "place- holder."
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| no operands |
3 |
- |
1 |
NOP |
NOT Logical NOT
See Also: NEG, AND, OR, XOR, EA
Flags: not altered
NOT destination
Logic:
destination ß NOT(destination) ; one's complement
NOT inverts each bit of its operand (that is, forms the one's complement). The operand can be a word or byte.
NOT Instruction Logic
| Destination |
Result |
| 0 |
1 |
| 1 |
0 |
| Operands |
Clocks |
Transfers |
Bytes |
Example |
|
|
byte(word) |
|
|
|
| register |
3 |
- |
2 |
NOT DX |
| memory |
16(24)+EA |
2 |
2-4 |
NOT MASK |
OR Logical OR
See Also: AND, NOT, XOR, EA, Flags
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
0 |
|
|
|
* |
* |
? |
* |
0 |
OR destination,source
Logic:
destination ß destination OR source
OR performs a bit-by-bit logical inclusive OR operation on its operands and returns the result to destination.The operands may be words or bytes.
OR Instruction Logic
| Destination |
Source |
Result |
| 0 |
0 |
0 |
| 0 |
1 |
1 |
| 1 |
0 |
1 |
| 1 |
1 |
1 |
OR sets each bit of the result to 1 if either or both of the corresponding bits of the operands are 1.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
|
|
byte(word) |
|
|
|
| register, register |
3 |
- |
2 |
OR CH,DL |
| register, memory |
9(13)+EA |
1 |
2-4 |
OR BX, MEM_OR_Y |
| memory, register |
16(24)+EA |
2 |
2-4 |
OR MEM_OR_Y, BX |
| accumulator, immediate |
4 |
- |
2-3 |
OR AL,01110110b |
| register, immediate |
4 |
- |
3-4 |
OR CX,00FFh |
| memory, immediate |
17(25)+EA |
2 |
3-6 |
OR MEM_WORD,76h |
OUT Output to Port
See Also: IN
Flags: not altered
OUT port,accumulator
Logic:
(port) ß accumulator
OUT transfers a byte or a word from AL or AX to the specified port. The port may be specified with an immediate byte constant (allowing access to ports 0 through 255) or with a word value in DX (allowing access to ports 0 through 65,535).
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| byte(word) |
|
|
|
|
| immed8, accumulator |
10(14) |
1 |
2 |
OUT 254,AX |
| DX, accumulator |
8(12) |
1 |
1 |
OUT DX,AL |
It is advised that hardware not use I/O ports F8h through FFh, since these are reserved for controlling the math coprocessor and future processor extensions.Note:
POP POP a Word from the Stack
See Also: PUSH, POPF, MOV, XCHG, XLAT, EA
Flags: not altered
POP destination
Logic:
destination ß (SP)SP
POP transfers the word at the top of the stack to the destination operand, then increments SP by 2 to point to the new top of stack.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| register |
12 |
1 |
1 |
POP CX |
| seg-reg (CS illegal) |
12 |
1 |
1 |
POP ES |
| memory |
25+EA |
2 |
2-4 |
POP VALUE |
You may not use the CS register as the destination of a POP instruction.Note:
POPF POP Flags from the Stack
See also: POP, PUSH, PUSHF, LAHF, SAHF
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
r |
r |
r |
r |
r |
r |
r |
r |
r |
Logic:
flag-register ß (SP)SP
POPF transfers the word at the top of the stack to the flags register, replacing the old flags, then increments SP by 2 to point to the new top of stack.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| no operands |
12 |
1 |
1 |
POPF |
PUSH Push Word onto Stack
See also:POP, POPF, PUSHF, MOV, XCHG, EA
Flags: not altered
PUSH source
Logic:
SP ß SP - 2(SP)
PUSH decrements SP by 2, then copies the operand to the new top of stack. The source of a PUSH instruction cannot be an 8-bit register.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| register |
15 |
1 |
1 |
PUSH BX |
| seg-reg (CS illegal) |
14 |
1 |
1 |
PUSH ES |
| memory |
24+EA |
2 |
2-4 |
PUSH PARAMETERS |
Even if the source refers to a byte in memory, a full word is always pushed.Note:
The 80286 and 80386 microprocessors will push a different value on the stack for the instruction PUSH SP than will the 8086/8088.The 80286 and 80386 push the value of SP before SP is incremented, while the 8086/8088 increments SP first, then pushes SP on the stack.Use the following code instead of a PUSH SP in order to obtain the same results on all microprocessors.
PUSH BP
MOV BP, SP
XCHGBP, [BP]
This code functions in the same manner as a PUSH SP on the 8088/8086.
PUSHF Push Flags onto Stack
See Also: POPF, LAHF, SAHF
Flags: not altered
Logic: SP
ß SP - 2(SP)
PUSHF decrements SP by 2, then transfers the flags register to the new top of stack.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| no operands |
14 |
1 |
1 |
PUSHF |
RCL Rotate through Carry Left
See Also: ROL, ROR, RCR, SHL, SHR, SAR, SAL, EA, Flags
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
* |
|
|
|
|
|
|
|
* |
RCL destination,count
RCL shifts the word or byte at the destination to the left by the number of bit positions specified in the second operand, COUNT. A bit shifted out of the left (high-order) end of the destination enters the carry flag, and the displaced carry flag rotates around to enter the vacated right-most bit position of the destination. This "bit rotation" continues the number of times specified in COUNT. (Another way of looking at this is to consider the carry flag as the highest order bit of the word being rotated.)
If COUNT is not equal to 1, the Overflow flag is undefined. If COUNT is equal to 1, then the Overflow Flag is set to the XOR of the top 2 bits of the original operand.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
|
|
byte(word) |
|
|
|
| register, 1 |
2 |
- |
2 |
RCL CX,1 |
| register, CL |
8+4/bit |
- |
2 |
RCL BL,CL |
| memory, 1 |
15(23)+EA |
2 |
2-4 |
RCL MULTIPLY_X_2,1 |
| memory, CL |
20(28)+EA+4/bit |
2 |
2-4 |
RCL MOVE_AROUND,CL |
COUNT is normally taken as the value in CL. If, however, you wish to rotate only one position, replace the second operand, CL, with the value 1, as shown in the first example above.Note:
The 80286 and 80386 microprocessors limit the COUNT value to 31.If the COUNT is greater than 31, these microprocessors use COUNT MOD 32 to produce a new COUNT between 0 and 31.This upper bound exists to limit the amount of time that an interrupt response will be delayed waiting for the instruction to complete.
Multiple RCLs that use 1 as the COUNT may be faster and require less memory than a single RCL that uses CL for COUNT.
The overflow flag is undefined if the rotate count is greater than 1.
RCR Rotate through Carry Right
See Also: ROR, RCL, ROL, SAR, SHR, SHL, SAL, EA, Flags
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
* |
|
|
|
|
|
|
|
* |
RCR destination, count
RCR shifts the word or byte at the destination to the right by the number of bit positions specified in the second operand, COUNT. A bit shifted out of the right (low-order) end of the destination enters the carry flag, and the displaced carry flag rotates around to enter the vacated left-most bit position of the destination. This "bit rotation" continues the number of times specified in COUNT. (Another way of looking at this is to consider the carry flag as the lowest order bit of the word being rotated.)
If COUNT is not equal to 1, the Overflow flag is undefined. If COUNT is equal to 1, the Overflow Flag is set to the XOR of the top 2 bits of the result.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
|
|
byte(word) |
|
|
|
| register, 1 |
2 |
- |
1 |
RCR CX,1 |
| register, CL |
8+4/bit |
- |
2 |
RCR DL,CL |
| memory, 1 |
15(23)+EA |
2 |
2-4 |
RCR DIVIDE_BY_2,1 |
| memory, CL |
20(28)+EA+4/bit |
2 |
2-4 |
RCR AROUND_MOVE,CL |
COUNT is normally taken as the value in CL. If, however, you wish to rotate only one position, replace the second operand, CL, with the value 1, as shown in the first example above.Note:
The 80286 and 80386 microprocessors limit the COUNT value to 31.If COUNT is greater than 31, these microprocessors use COUNT MOD 32 to produce a new COUNT between 0 and 31.This upper bound exists to limit the amount of time an interrupt response will be delayed waiting for the instruction to complete.
Multiple RCRs that use 1 as the COUNT may be faster and require less memory than a single RCR that uses CL for COUNT.
The overflow flag is undefined if the rotate count is greater than 1.
REP Repeat
See Also: REPNE, MOVS, STOS, CMPS, SCAS, LODS, CLD, STD
Flags: not altered
REP string-instruction
Logic:
while CX <> 0 ;for MOVS, LODS or STOSexecute string instruction
CX ß CX - 1
while CX <> 0
execute string instruction ;for CMPS or SCAS
CX ß CX - 1
if ZF = 0 terminate loop
REP is a prefix that may be specified before any string instruction (CMPS, LODS, MOVS, SCAS, and STOS). REP causes the string instruction following it to be repeated, as long as CX does not equal 0; CX is decremented after each execution of the string instruction.(For CMPS and SCAS, REP will also terminate the loop if the Zero Flag is clear after the string instruction executes.)
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| - |
2 |
- |
1 |
REP MOVS TO,FROM |
If CX is initially 0, the REPeated instruction is skipped entirely.Note:
The test for CX equal to 0 is performed before the instruction is executed.The test for the Zero Flag clear--done only for CMPS and SCAS--is performed after the instruction is executed.
REP, REPE (Repeat While Equal), and REPZ (Repeat While Zero) are all synonyms for the same instruction.
REPNZ (Repeat Not Zero) is similar to REP, but when used with CMPS and SCAS, will terminate with the Zero Flag set, rather than cleared.
REP is generally used with the MOVS (Move String) and STOS (Store String) instructions; it can be thought of as "repeat while not end of string."
You do not need to initialize ZF before using repeated string instructions.
A REPeated instruction that is interrupted between repeats will correctly resume processing upon return from the interrupt. However, if other prefixes are used on a single instruction (for example, segment override or LOCK) in addition to the REP, all prefixes except the one that immediately preceded the string instruction will be lost. Therefore, if you must use more than one prefix on a single instruction, you should disable interrupts before the instruction, and enable them afterwards. Note that even this precaution will not prevent a non-maskable interrupt, and that lengthy string operations may cause large delays in interrupt processing.
Example:
CLD ;Move in the forward direction
LEA SI, BUFFER1 ;Source pointer to SI
LEA DI, BUFFER2 ;...and destination to DI
MOV CX,100 ;REP uses CX as the counter
REP MOVSB ;...and do it
REPE Repeat While Equal
See Also: REP
Flags: not altered
This instruction is a synonym for REP. See the description for REP.
REPNE Repeat While not Equal
See Also: REP, MOVS, STOS, CMPS, SCAS, LODS, CLD, STD
Flags: not altered
REPNE string-instruction
Logic:
while CX <> 0 ;for MOVS, LODS or STOSexecute string instruction
CX ß CX - 1
while CX <> 0 ;for CMPS or SCAS
execute string instruction
CX ß CX - 1
if ZF <> 0 terminate loop ;This is only difference
;between REP and REPNE
REPNE is a prefix that may be specified before any string instruction (CMPS, LODS, MOVS, SCAS, and STOS). REPNE causes the string instruction following it to be repeated, as long as CX does not equal 0; CX is decremented after each execution of the string instruction. (For CMPS and SCAS, REP will also terminate the loop if the Zero Flag is set after the string instruction executes. Compare this to REP, which will terminate if the Zero Flag is clear.)
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| - |
2 |
- |
1 |
REPNE SCASB |
If CX is initially 0, the REPeated instruction is skipped entirely.Note:
The test for CX equal to 0 is performed before the instruction is executed.The test for the Zero Flag set--done only for CMPS and SCAS--is performed after the instruction is executed.
REPNE and REPNZ are synonyms for the same instruction.
You do not need to initialize ZF before using repeated string instructions.
A repeated instruction that is interrupted between repeats will correctly resume processing upon return from the interrupt. However, if other prefixes are used on a single instruction (for example, segment override or LOCK) in addition to the REP, all prefixes except the one that immediately preceded the string instruction will be lost. Therefore, if you must use more than one prefix on a single instruction, you should disable interrupts before the instruction, and enable them afterwards. Note that even this precaution will not prevent a non-maskable interrupt, and that lengthy string operations may cause large delays in interrupt processing.
Example:
CLD ;Scan string in forward direction
MOV AL,'A' ;Scan for 'A'
LEA DI, STRING ;Address to start scanning at
MOV CX,100 ;Scanning 100 bytes
REPNE SCASB ; ...and scan it
DEC DI ;Back up DI to point to the 'A'
Upon termination of the repeated SCASB instruction, CX will be equal to zero if a byte value of 'A' was not found in STRING, and non-zero if it was.
REPNZ Repeat While Not Zero
See Also: REPNE
Flags: not altered
REPNZ is the same instruction as REPNE. See the description for REPNE.
REPZ Repeat While Zero
See Also: REP
Flags: not altered
This instruction is a synonym for REP. See the description for REP.
RET Return from Procedure
See Also: IRET, CALL, JMP
Flags: not altered
RET optional-pop-value
Logic:
POP IPIf FAR RETURN (inter-segment)
POP CS
SP ß SP + optional-pop-value (if specified)
RET transfers control from a called procedure back to the instruction following the CALL, by:
Popping the word at the top of the stack into IP
If the return is an intersegment return:
Popping the word now at the top of the stack into CS
Adding the optional-pop-value, if specified, to SP
The assembler will generate an intrasegment RET if the procedure containing the RET was designated by the programmer as NEAR, and an intersegment RET if it was designated FAR. The optional-pop-value specifies a value to be added to SP, which has the effect of popping the specified number of bytes from the top of the stack.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| (intrasegment, no pop) |
20 |
1 |
1 |
RET |
| (intrasegment, with pop) |
24 |
1 |
3 |
RET 4 |
| (intersegment, no pop) |
32 |
2 |
1 |
RET |
| (intersegment, pop) |
31 |
2 |
3 |
RET 2 |
ROL Rotate Left
See Also: RCL, ROR, RCR, SAL, SAR, SHL, SHR, EA, Flags
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
* |
|
|
|
|
|
|
|
* |
ROL destination,count
ROL shifts the word or byte at the destination to the left by the number of bit positions specified in the second operand, COUNT. As bits are transferred out the left (high-order) end of the destination, they re-enter on the right (low-order) end. The Carry Flag is updated to match the last bit shifted out of the left end.
If COUNT is not equal to 1, the Overflow flag is undefined. If COUNT is equal to 1, then the Overflow Flag is set to the XOR of the top 2 bits of the original operand.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| byte(word) |
|
|
|
|
| register, 1 |
2 |
- |
2 |
ROL DI,1 |
| register, CL |
8+4/bit |
- |
2 |
ROL BX,CL |
| memory, 1 |
15(23)+EA |
2 |
2-4 |
ROL BYTE,1 |
| memory, CL |
20(28)+EA+4/bit |
2 |
2-4 |
ROL WORD,CL |
COUNT is normally taken as the value in CL. If, however, you wish to rotate only one position, replace the second operand, CL, with the value 1, as shown in the first example above.Note:
The 80286 and 80386 microprocessors limit the COUNT value to 31.If COUNT is greater than 31, these microprocessors will use COUNT MOD 32 to produce a new COUNT between 0 and 31.This upper boundary exists to limit the amount of time that an interrupt response will be delayed waiting for the instruction to complete.
Multiple ROLs that use 1 as the COUNT may be faster and require less memory than a single ROL that uses CL for COUNT.
The overflow flag is undefined when the rotate count is greater than 1.
ROR Rotate Right
See Also: RCR, ROL, RCL, SAR, SAL, SHL, SHR, EA, Flags
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
* |
|
|
|
|
|
|
|
* |
ROR destination,count
ROR shifts the word or byte at the destination to the right by the number of bit positions specified in the second operand, COUNT. As bits are transferred out the right (low-order) end of the destination, they re-enter on the left (high-order) end. The Carry Flag is updated to match the last bit shifted out of the right end.
If COUNT is not equal to 1, the Overflow flag is undefined. If COUNT is equal to 1, the Overflow Flag is set to the XOR of the top 2 bits of the result.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
|
|
byte(word) |
|
|
|
| register, 1 |
2 |
- |
2 |
ROR BL,1 |
| register, CL |
8+4/bit |
- |
2 |
ROR AX,CL |
| memory, 1 |
15(23)+EA |
2 |
2-4 |
ROR WORD,1 |
| memory, CL |
20(28)+EA+4/bit |
2 |
2-4 |
ROR BYTE,CL |
COUNT is normally taken as the value in CL. If, however, you wish to rotate by only one position, replace the second operand, CL, with the value 1, as shown in the first example above.Note:
The 80286 and 80386 microprocessors limit the COUNT value to 31.If the COUNT is greater than 31, these microprocessors use COUNT MOD 32 to produce a new COUNT between 0 and 31.This upper bound exists to limit the amount of time an interrupt response will be delayed waiting for the instruction to complete.
Multiple RORs that use 1 as the COUNT may be faster and require less memory than a single ROR that uses CL for COUNT.
The overflow flag is undefined when the rotate count is greater than 1.
SAHF Store Register AH into Flags
See Also: LAHF, PUSHF, POPF, Flags
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
|
|
|
|
* |
* |
* |
* |
* |
Logic:
Flag-reg bits ß AH bitsS Z A P C
SAHF copies bits 7, 6, 4, 2, and 0 from the AH register into the Flags register, replacing the previous values of the Sign, Zero, Auxiliary Carry, Parity, and the Carry flags.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| no operands |
4 |
- |
1 |
SAHF |
The Overflow, Direction, Interrupt, and Trap flags are not changed by this instruction. This instruction is primarily used to provide upward compatibility between the 8080/8085 family and the 8086 family.Note:
SAL Shift Arithmetic Left
See also: SHL, SAR, SHR, RCL, RCR, ROL, ROR, EA, Flags
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
* |
|
|
|
* |
* |
? |
* |
* |
SAL destination,count
SAL shifts the word or byte at the destination to the left by the number of bit positions specified in the second operand, COUNT. As bits are transferred out the left (high-order) end of the destination, zeroes are shifted in the right (low-order) end. The Carry Flag is updated to match the last bit shifted out of the left end. If COUNT is not equal to 1, the Overflow flag is undefined. If COUNT is equal to 1, the Overflow Flag is cleared if the top 2 bits of the original operand were the same, otherwise the Overflow Flag is set.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
|
|
byte(word) |
|
|
|
| register, 1 |
2 |
- |
2 |
SAL AL,1 |
| register, CL |
8+4/bit |
- |
2 |
SAL SI,CL |
| memory, 1 |
15(23)+EA |
2 |
2-4 |
SAL WORD,1 |
| memory, CL |
20(28)+EA+4/bit |
2 |
2-4 |
SAL BYTE,CL |
COUNT is normally taken as the value in CL. If, however, you wish to shift only one position, replace the second operand, CL, with the value 1, as shown in the first example above.Note:
The 80286 and 80386 microprocessors limit the COUNT value to 31.If the COUNT is greater than 31, these microprocessors use COUNT MOD 32 to produce a new COUNT between 0 and 31.This upper bound exists to limit the amount of time an interrupt response will be delayed waiting for the instruction to complete.
Multiple SALs that use 1 as the COUNT may be faster and require less memory than a single SAL that uses CL for COUNT.
SHL, Shift Logical Left, is the same instruction; SHL is a synonym for SAL.
The overflow flag is undefined when the shift count is greater than 1.
SAR Shift Arithmetic Right
See Also: SHR, SAL, SHL, RCR, RCL, ROR, ROL, EA, Flags
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
* |
|
|
|
* |
* |
? |
* |
* |
SAR destination,count
SAR shifts the word or byte in destination to the right by the number of bit positions specified in the second operand, COUNT. As bits are transferred out the right (low-order) end of the destination, bits equal to the original sign bit are shifted into the left (high-order) end, thereby preserving the sign bit. The Carry Flag is set equal to the last bit shifted out of the right end. If COUNT is not equal to 1, the Overflow flag is undefined. If COUNT is equal to 1, the Overflow flag is cleared.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
|
|
byte(word) |
|
|
|
| register, 1 |
2 |
- |
2 |
SAR DX,1 |
| register, CL |
8+4/bit |
- |
2 |
SAR DI,CL |
| memory, 1 |
15(23)+EA |
2 |
2-4 |
SAR N_BLOCKS,1 |
| memory, CL |
20(28)+EA+4/bit |
2 |
2-4 |
SAR N_BLOCKS,CL |
COUNT is normally taken as the value in CL. If, however, you wish to shift only one position, replace the second operand, CL, with the value 1, as shown in the first example above.Note:
The 80286 and 80386 microprocessors limit the COUNT value to 31.If the COUNT is greater than 31, these microprocessors use COUNT MOD 32 to produce a new COUNT between 0 and 31.This upper bound exists to limit the amount of time an interrupt response will be delayed waiting for the instruction to complete.
Multiple SARs that use 1 as the COUNT may be faster and require less memory than a single SAR that uses CL for COUNT.
The overflow flag is undefined when the shift count is greater than 1.
SBB Subtract with Borrow
See Also: SUB, DEC, NEG, AAS, DAS, EA, Flags
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
* |
|
|
|
* |
* |
* |
* |
* |
SBB destination,source
Logic:
destination ß destination - source - CF
SBB subtracts the source from the destination, subtracts 1 from that result if the Carry Flag is set, and stores the result in destination. The operands may be bytes or words, and both may be signed or unsigned binary numbers.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
|
|
byte(word) |
|
|
|
| register, register |
3 |
- |
2 |
SBB DX,AX |
| register, memory |
9(13)+EA |
1 |
2-4 |
SBB DX,FEE |
| memory, register |
16(24)+EA |
2 |
2-4 |
SBB SIGH,SI |
| accumulator, immediate |
4 |
- |
2-3 |
SBB AX,8 |
| register, immediate |
4 |
- |
3-4 |
SBB BH,4 |
| memory, immediate |
17(25)+EA |
2 |
3-6 |
SBB TOTAL,10 |
SBB is useful for subtracting numbers that are larger than 16 bits, since it subtracts a borrow (in the carry flag) from a previous operation.Note:
You may subtract a byte-length immediate value from a destination which is a word; in this case, the byte is sign-extended to 16 bits before the subtraction.
SCAS Scan String (Byte or Word)
See Also: SCASB, SCASW, CMP, CMPS, REP, CLD, STD, Flags
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
* |
|
|
|
* |
* |
* |
* |
* |
SCAS destination-string
Logic:
CMP Accumulator, (ES:DI);Sets flags onlyif DF = 0
DI ß DI + n ;n = 1 for byte, 2 for word
else
DI ß DI - n
This instruction compares the accumulator (AL or AX) to the byte or word pointed to by ES:DI. SCAS sets the flags according to the results of the comparison; the operands themselves are not altered. After the comparison, DI is incremented (if the direction flag is cleared) or decremented (if the direction flag is set), in preparation for comparing the next element of the string.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
|
|
byte(word) |
|
|
|
| dest-str |
15(19) |
1 |
1 |
SCAS WORD_TABLE |
| (repeat) dest-str |
9+15(19)/rep |
1/rep |
1 |
REPNE SCAS BYTE_TABLE |
This instruction is always translated by the assembler into either SCASB, Scan String Byte, or SCASW, Scan String Word, depending upon whether destination-string refers to a string of bytes or words. In either case, however, you must explicitly load the DI register with the offset of the string.Note:
SCAS is useful for searching a block for a given byte or word value. Use CMPS, Compare String, if you wish to compare two strings (or blocks) in memory, element by element.
Example:
LOST_A DB 100DUP(?)
the following example searches the 100-byte block starting at LOST_A for the character 'A' (65 decimal).
MOV AX, DS
MOV ES, AX ;SCAS uses ES:DI, so copy DS to ES
CLD ;Scan in the forward direction
MOV AL, 'A' ;Searching for the lost 'A'
MOV CX,100 ;Scanning 100 bytes (CX is used by REPNE)
LEA DI, LOST_A ;Starting address to DI
REPNE SCASLOST_A ;...and scan it.
JE FOUND ;The Zero Flag will be set if we found a match.
NOTFOUND: . ;If we get here, no match was found
.
.
FOUND: DEC DI ;Back up DI so it points to the first
. ; matching 'A'
.
Upon exit from the REPNE SCAS loop, the Zero Flag will be set if a match was found, and cleared otherwise. If a match was found, DI will be pointing one byte past the match location; the DEC DI at FOUND takes care of this problem.
SCASB Scan String Byte
See Also: SCAS, SCASW, CMPS, REP, CLD, STD, Flags
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
* |
|
|
|
* |
* |
* |
* |
* |
SCASB
Logic:
CMP AL, (ES:DI) ; Sets flags onlyif DF = 0
DI ß DI + 1
else
DI ß DI - 1
This instruction compares two bytes by subtracting the destination byte, pointed to by ES:DI, from AL. SCASB sets the flags according to the results of the comparison. The operands themselves are not altered. After the comparison, DI is incremented (if the direction flag is cleared) or decremented (if the direction flag is set), in preparation for comparing the next byte.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| - |
15 |
1 |
1 |
SCASB |
| (repeat) |
9+15/rep |
1/rep |
1 |
REPNE SCASB |
SCAS is useful for searching a block for a given byte or word value. Use CMPS, Compare String, if you wish to compare two strings (or blocks) in memory, element by element.Note:
Example:
MOV AX, DS
MOV ES, AX ;SCAS uses ES:DI, so copy DS to ES
CLD ;Scan in the forward direction
MOV AL, 'A' ;Searching for the lost 'A'
MOV CX,100 ;Scanning 100 bytes (CX is used by REPNE)
LEA DI, LOST_A ;Starting address to DI
REPNE SCASB ; ...and scan it.
JE FOUND ;The Zero Flag will be set if we found a match.
NOTFOUND: . ;If we get here, no match was found
.
.
FOUND: DEC DI ;Back up DI so it points to the first
. ;matching 'A'
.
Upon exit from the REPNE SCASB loop, the Zero Flag will be set if a match was found, and cleared otherwise. If a match was found, DI will be pointing one byte past the match location; the DEC DI at FOUND takes care of this problem.
SCASW Scan String Word
See Also: SCAS, SCASB, CMPS, REP, CLD, STD, Flags
| Flags Affected: O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
|
* |
|
|
|
* |
* |
* |
* |
* |
SCASW
Logic:
CMP AX, (ES:DI) ; Sets flags onlyif DF = 0
DI ß DI + 2
else
DI ß DI - 2
This instruction compares two words by subtracting the destination word, pointed to by ES:DI, from AX. SCASW sets the flags according to the results of the comparison. The operands themselves are not altered. After the comparison, DI is incremented (if the direction flag is cleared) or decremented (if the direction flag is set), in preparation for comparing the next word.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| - |
19 |
1 |
1 |
SCASW |
| (repeat) |
9+19/rep |
1/rep |
1 |
REPNE SCASW |
SCAS is useful for searching a block for a given byte or word value. Use CMPS, Compare String, if you wish to compare two strings (or blocks) in memory, element by element.Note:
Example:
MOV AX, DS
MOV ES, AX ;SCAS uses ES:DI, so copy DS to ES
CLD ;Scan in the forward direction
MOV AL, 'A' ;Searching for the lost 'A'
MOV CX,50 ;Scanning 50 words (CX is used by REPNE)
LEA DI, LOST_A ;Starting address to DI
REPNE SCASW ; ...and scan it.
JE FOUND ;The Zero Flag will be set if we found a match.
REPNE SCASW ; ...and scan it.
JE FOUND ;The Zero Flag will be set if we found a match.
NOTFOUND: . ;If we get here, no match was found
.
.
FOUND: DEC DI ;Back up DI so it points to the first
DEC DI ;matching 'A'
.
.
Upon exit from the REPNE SCASW loop, the Zero Flag will be set if a match was found, and cleared otherwise. If a match was found, DI will be pointing two bytes (one word) past the match location; the DEC DI pair at FOUND takes care of this problem.
SHL Shift Logical Left
See Also: SAL, SHR, SAR, RCL, RCR, ROL, ROR, EA, Flags
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
* |
|
|
|
* |
* |
? |
* |
* |
SHL destination,count
SHL is the same instruction as SAL, Shift Arithmetic Left. SHL shifts the word or byte at the destination to the left by the number of bit positions specified in the second operand, COUNT. As bits are transferred out the left (high-order) end of the destination, zeroes are shifted in the right (low-order) end. The Carry Flag is updated to match the last bit shifted out of the left end.
If COUNT is not equal to 1, the Overflow flag is undefined. If COUNT is equal to 1, the Overflow Flag is cleared if the top 2 bits of the original operand were the same, otherwise the Overflow Flag is set.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
|
|
byte(word) |
|
|
|
| register, 1 |
2 |
- |
2 |
SHL AL,1 |
| register, CL |
8+4/bit |
- |
2 |
SHL SI,CL |
| memory, 1 |
15(23)+EA |
2 |
2-4 |
SHL WORD,1 |
| memory, CL |
20(28)+EA+4/bit |
2 |
2-4 |
SHL BYTE,CL |
COUNT is normally taken as the value in CL. If, however, you wish to shift only one position, replace the second operand, CL, with the value 1, as shown in the first example below.Note:
The 80286 and 80386 microprocessors limit the COUNT value to 31.If the COUNT is greater than 31, these microprocessors use COUNT MOD 32 to produce a new COUNT between 0 and 31.This upper bound exists to limit the amount of time an interrupt response will be delayed waiting for the instruction to complete.
Multiple SHLs that use 1 as the COUNT may be faster and require less memory than a single SHL that uses CL for COUNT.
The overflow flag is undefined when the shift count is greater than 1.
SHR Shift Logical Right
See Also: SAR, SHL, SAL, RCR, RCL, ROR, ROL, EA, Flags
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
* |
|
|
|
* |
* |
? |
* |
* |
SHR destination,count
SAR shifts the bits in destination to the right by the number of positions specified in the count operand (or in CL, if no count operand is included). 0s are shifted in on the left. If the sign bit retains its original value, the Overflow Flag is cleared; it is set if the sign changes. The Carry Flag is updated to reflect the last bit shifted.
If COUNT is not equal to 1, the Overflow flag is undefined, otherwise the Overflow Flag is set to the high-order bit of the original operand.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| register, 1 |
2 |
- |
2 |
SHR SI,1 |
| register, CL |
8+4/bit |
- |
2 |
SHR SI,CL |
| memory, 1 |
15+EA |
2 |
2-4 |
SHR ID_BYTE[SI][BX], |
| memory, CL |
20+EA+4/bit |
2 |
2-4 |
SHR INPUT_WORD,CL |
COUNT is normally taken as the value in CL. If, however, you wish to shift only one position, replace the second operand, CL, with the value 1, as shown in the first example below.Note:
The 80286 and 80386 microprocessors limit the COUNT value to 31.If the COUNT is greater than 31, these microprocessors use COUNT MOD 32 to produce a new COUNT between 0 and 31.This upper bound exists to limit the amount of time an interrupt response will be delayed waiting for the instruction to complete.
Multiple SHRs that use 1 as the COUNT may be faster and require less memory than a single SHR that uses CL for COUNT.
The overflow flag is undefined when the shift count is greater than 1.
STC Set Carry Flag
See Also: CLC, CMC, STD, CLD, STI, CLI, Flags
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
|
|
|
|
|
|
|
|
1 |
Logic:
CF ß 1
STC sets the Carry Flag. No other flags are affected.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| no operands |
2 |
- |
1 |
STC |
STD Set Direction Flag
See Also: CLD, STC, CLC, CMC, STI, CLI, Flags
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
|
1 |
|
|
|
|
|
|
|
Logic:
DF ß 1 (Decrement in string instructions)
STD sets the Direction Flag. No other flags are affected. Setting the direction flag causes string operations to decrement SI and DI.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| no operands |
2 |
- |
1 |
STD |
STI Set Interrupt Enable Flag
See Also: CLI, STC, CLC, CMC, STD, CLD, Flags
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
|
|
1 |
|
|
|
|
|
|
Logic:
IF ß 1
STI sets the Interrupt Enable Flag, permitting the processor to recognize maskable interrupts. No other flags are affected. (Non- maskable interrupts are recognized no matter what the state of the interrupt enable flag.)
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| no operands |
2 |
- |
1 |
STI |
A pending interrupt will not be recognized until after the instruction following the STI executes.Note:
STOS Store String (Byte or Word)
See Also: STOSB, STOSW, CMPS, LODS, MOVS, SCAS, REP, CLD, STD
Flags: not altered
STOS destination-string
Logic:
(ES:DI) ß Accumulatorif DF = 0
DI
else
ß DI - nDI
STOS copies the value (byte or word) in AL or AX into the location pointed to by ES:DI. DI is then incremented (if the direction flag is cleared) or decremented (if the direction flag is set), in preparation for storing the accumulator in the next location.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
|
|
byte(word) |
|
|
|
| dest-string |
11(15) |
1 |
1 |
STOS WORD_ARRAY |
| (repeat) dest-string |
9+10(14)/rep |
1/rep |
1 |
REP STOS BYTE_ARRAY |
This instruction is always translated by the assembler into either STOSB, Store String Byte, or STOSW, Store String Word, depending upon whether destination-string refers to a string of bytes or words. In either case, however, you must explicitly load the DI register with the offset of the string.Note:
Example:
MOV AL,0 ;The value to initialize BUFFER to
LEA DI,BUFFER ;Starting location of BUFFER
MOV CX,100 ;Size of BUFFER
CLD ;Let's move in forward direction
REP STOS BUFFER ;Compare this line to example for STOSB
STOSB Store String Byte
See Also: STOS, STOSW, CMPS, LODS, MOVS, SCAS, REP, CLD, STD
Flags: not altered
STOSB
Logic:
(ES:DI) ß ALif DF = 0
DI
else
ß DI - 1DI
STOSB copies the value in AL into the location pointed to by ES:DI. DI is then incremented (if the direction flag is cleared) or decremented (if the direction flag is set), in preparation for storing AL in the next location.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| - |
11 |
1 |
1 |
STOSB |
| (repeat) |
9+10/rep |
1/rep |
1 |
REP STOSB |
When used in conjunction with the REP prefixes, the Store String instructions are useful for initializing a block of memory. For example, the following code would initialize the 100-byte memory block at BUFFER to 0:
MOV AL,0 ;The value to initialize BUFFER to
LEA DI,BUFFER ;Starting location of BUFFER
MOV CX,100 ;Size of BUFFER
CLD ;Let's move in forward direction
REP STOSB ;Compare this line to example for STOS
STOSW Store String Word
See Also: STOS, STOSB, CMPS, LODS, MOVS, SCAS, REP, CLD, STD
Flags: not altered
Logic: (ES:DI)
ß AXif DF = 0
DI
else
ß DI - 2DI
STOSW copies the value in AX into the location pointed to by ES:DI. DI is then incremented (if the direction flag is cleared) or decremented (if the direction flag is set), in preparation for storing AX in the next location.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| - |
15 |
1 |
1 |
STOSW |
| (repeat) |
9+14/rep |
1/rep |
1 |
REP STOSW |
When used in conjunction with the REP prefixes, the Store String instructions are useful for initializing a block of memory. For example, the following code would initialize the 100-byte memory block at BUFFER to 0:
MOV AX,0 ;The value to initialize BUFFER to
LEA DI,BUFFER ;Starting location of BUFFER
MOV CX,50 ;Size of BUFFER, in words
CLD ;Let's move in forward direction
REP STOSW ;Compare this line to example for STOS
SUB Subtract
See Also: SBB, DEC, NEG, CMP, AAS, DAS, EA, Flags
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
* |
|
|
|
* |
* |
* |
* |
* |
SUB destination,source
Logic:
destination ß destination - source
SUB subtracts the source operand from the destination operand and stores the result in destination. Both operands may be bytes or words, and both may signed or unsigned binary numbers.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
|
|
byte(word) |
|
|
|
| register, register |
3 |
- |
2 |
SUB DX,BX |
| register, memory |
9(13)+EA |
1 |
2-4 |
SUB DX,TOTAL |
| memory, register |
16(24)+EA |
2 |
2-4 |
SUB RATE,CL |
| accumulator, immediate |
4 |
- |
2-3 |
SUB AH,25 |
| register, immediate |
4 |
- |
3-4 |
SUB DX,5280 |
| memory, immediate |
17(25)+EA |
2 |
3-6 |
SUB RESULT,1032 |
You may wish to use SBB if you need to subtract numbers that are larger than 16 bits, since SBB subtracts a borrow from a previous operation.Note:
You may subtract a byte-length immediate value from a destination which is a word; in this case, the byte is sign-extended to 16 bits before the subtraction.
TEST Test
See Also: CMP, AND, NOT, OR, XOR, EA, Flags
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
0 |
|
|
|
* |
* |
? |
* |
0 |
TEST destination,source
Logic:
(destination AND source) ; Set flags onlyCF ß 0
OF ß 0
TEST performs a logical AND on its two operands and updates the flags. Neither the destination nor source is changed.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
|
|
byte(word) |
|
|
|
| register, register |
3 |
- |
2 |
TEST SI,DX |
| register, memory |
9(13)+EA |
1 |
2-4 |
TEST SI,MASK |
| accumulator, immediate |
4 |
- |
2-3 |
TEST AL,00000100b |
| register, immediate |
5 |
- |
3-4 |
TEST CX,1234 |
| memory, immediate |
11+EA |
- |
3-6 |
TEST PARAM,1F1Fh |
TEST is useful for examining the status of individual bits. For example, the following section of code will transfer control to ONE_FIVE_OFF if both bits one and five of register AL are cleared. The status of all other bits will be ignored.
TEST AL,00100010b ;Mask out all bits except 1 and 5
JZ ONE_FIVE_OFF ;If either was set, result was not 0
NOT_BOTH: . ;One or both bits was set
ONE_FIVE_OFF: ;Bits 1 and 5 were off
.
.
WAIT Wait
See Also: HLT, ESC, LOCK
Flags: not altered
Logic: None
WAIT causes the processor to enter a wait state. The processor will remain inactive until the TEST input on the microprocessor is driven active.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| no operands |
3+5n |
- |
1 |
WAIT |
This instruction is used to synchronize external hardware, such as a coprocessor.Note:
XCHG Exchange Registers
See Also: MOV, PUSH, POP, XLAT, EA
Flags: not altered
XCHG destination,source
Logic:
destination ß-> source
XCHG switches the contents of its operands, which may be either bytes or words.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
|
|
byte(word) |
|
|
|
| accumulator, reg16 |
3 |
- |
1 |
XCHG AX,SI |
| memory, register |
17(25)+EA |
2 |
2-4 |
LOCK XCHG SEMPHOR, DX |
| register, register |
4 |
- |
2 |
XCHG CL,DL |
Used in conjunction with the LOCK prefix, this instruction is particularly useful when implementing semaphores to control shared resources.Note:
XLAT Translate
Flags: not altered
XLAT translate-table
Logic:
AL ß (BX + AL)
XLAT translates bytes via a table lookup. A pointer to a 256-byte translation table is loaded into BX. The byte to be translated is loaded into AL; it serves as an index (ie, offset) into the translation table. After the XLAT instruction is executed, the byte in AL is replaced by the byte located AL bytes from the beginning of the translate-table.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| translate-table |
11 |
1 |
1 |
XLAT SINE_TABLE |
Translate-table can be less than 256 bytes.Note:
The operand, translate-table, is optional since a pointer to the table must be loaded into BX before the instruction is executed.
The following example translates a decimal value (0 to 15) to the corresponding single hexadecimal digit.
lea bx, hex_table ;pointer to table into BX
mov al, decimal_digit ;digit to be translated to AL
xlat hex_table ;translate the value in AL
;AL now contains ASCII hex digit
.
hex_table db '0123456789ABCDEF'
XOR Exclusive OR
See also:OR, AND, NOT, EA, Flags
| Flags Affected: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
|
|
0 |
|
|
|
* |
* |
* |
* |
0 |
XOR destination,source
Logic:
destination ß destination XOR source
XOR performs a bit-by-bit "exclusive or" on its two operands, and returns the result in the destination operand.The operands may be bytes or words.
XOR Instruction Logic
| Destination |
Source |
Result |
| 0 |
0 |
0 |
| 0 |
1 |
1 |
| 1 |
0 |
1 |
| 1 |
1 |
0 |
XOR sets each bit of the result to 1 only one of the corresponding bits is set to one.
| Operands |
Clocks |
Transfers |
Bytes |
Example |
| register, register |
3 |
- |
2 |
XOR CX,BX |
| register, memory |
9(13)+EA |
1 |
2-4 |
XOR CL,MASK_BYTE |
| memory, register |
16(24)+EA |
2 |
2-4 |
XOR ALPHA[SI],DX |
| accumulator, immediate |
4 |
- |
2-3 |
XOR AL,01000001b |
| register, immediate |
4 |
- |
3-4 |
XOR SI,00C2h |
| memory, immediate |
17(25)+EA |
2 |
3-6 |
XOR RETURN_CODE,0D2h |