The timing charts show timings for the 8088. Since the 80x86 processors execute instructions in fewer clock cycles than the 8088, these charts represent the worst case.
| Operands | This field gives the list of possible operands and addressing modes for each instruction. |
| Clocks | Number of clock cycles required to execute the instruction on an 8088. Effective Address calculations (EA) take additional time, as outline in the EA table. |
| Transfers | The number of memory references. 4 clock cycles are required for each memory reference. |
| Bytes | Number of bytes in the instruction. |
Note: The additional clock cycles required to reinitialize the instruction que and fetch the next instruction after a control transfer instruction (such as JMP or CALL) is already included in the timing tables. Two clock times are listed for conditional transfer instructions (such as JZ); the shortest time is for the case when there is no transfer.
Each entry in this list includes information on which flags in the 8088's flag register are changed, and how they're changed. Since there are 9 flags in the flags register, the flags display is very compact. For example:
Flags: |
O |
D |
I |
T |
S |
Z |
A |
P |
C |
0 |
* |
* |
? |
* |
0 |
? - Undefined after the operation.
* - Changed to reflect the results of the instruction.
0 - Always cleared.
1 - Always set.
The flags register contains various bits that control and record the state of the microprocessor, as defined:
| Bit: | 15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
| Flags Register: | OF |
DF |
IF |
TF |
SF |
ZF |
AF |
PF |
CF |
| Overflow (O) | Set when an arithmetic overflow occurred. An arithmetic overflow occurs when the size of a computation exceeds the size of the destination. |
| Direction (D) | Set for auto-decrement with string instructions, clear for auto-increment. |
| Interrupt Enable (I) | Interrupts are enabled as long as this flag is set. When this flag is cleared, interrupts except for nonmaskable interrupts are disabled |
| Trap (T) | This flag is used by debuggers to single step through programs. When this flag is set, an INT 3 is generated after every instruction. |
| Sign (S) | Set when the high-order bit of the result is 1. In other words, S = 0 for positive numbers and S = 1 for negative numbers. |
| ZeroSet (Z) | Whenever the result is 0 |
| Auxiliary Carry (A) | Set when this a carry out of the lower half of an 8 or 16 bit number, or when there is a borrow from the upper to the lower half. This flag is used mainly by the decimal-arithmetic instructions. |
| Parity Flag (P) | Set if there is an even number of 1-bits in the result.Cleared if there is an odd number of 1-bits.Often used by communications programs |
| Carry Flag (C) | Set if there was a carry out of, or a borrow into the high-order bit of the result.This flag is useful for propagating carries and borrows for multi-word numbers. |
This table lists the number of clock cycles required to calculate the effective address on the 8088 microprocessor.The 80x8x processors require considerably fewer clock cycles to calculate effective addresses, so this table represents the worst-case.
EA Component |
8088 Clocks |
Example |
| Displacement: | 6 |
MOV AX, ADDR |
| Register indirect: | ||
| BX, BP, SI, DI | 5 | MOV AX, [BP] |
| Displacement + Base or Index: | ||
| BX
+ Disp, BP + Disp SI + Disp, DI + Disp |
9 | MOV AX, ADDR[BP] |
| Base + Index: | ||
|
7 | MOV AX, [BP+DI] |
|
8 | MOV AX, [BX+DI] |
| Displacement + Base + Index: | ||
|
11 | MOV AX, ADDR[BP+DI] |
|
12 | MOV AX, ADDR[BP+SI] |
Note: Add 2 clocks for segment overrides.
Each memory reference requires an additional 4 clock cycles.The Transfers field in the instruction timing charts gives the number of memory references for each instruction.
Última actualização: 02 Maio 2005