Critical Computing Systems - Railway Signalling
The Department of Informatics Engineering (DEI) of the Institute of Engineering of Porto (ISEP), in collaboration with the Master in Critical Computing Systems Engineering (MESCC), invites to participate in another seminar "Critical Computing Systems - Railway Signalling", that will take place on november 11th, at 18:30 PM, at ISEP.
The event will take place in room B402.
Abstract
The talk will provide an overview of Efacec solutions in the transportation domain, focusing on SIL4 (Safety Integrity Level 4) Railway Signaling products. The talk will provide an analysis of SIL4 Railway Signalling products’ development and certification processes throughout the development lifecycle: requirements management, design, implementation, verification and validation and safety management.
- Oradores
- Data e local
- Inscrições
- Informação Adicional
Cláudio Sagres is graduated in software engineering and interested in the railway world, he seized the opportunity to join the R&D team within the Transport Business Unit, where he had a major role in the design and development of the Efacec’s first electronic railway signaling system. Later, he joined the V&V department, where he is now responsible for the V&V activities and contributes in the area of functional safety within the transportation business.
https://www.linkedin.com/company/efacec/
Data: 2025-11-11
Horário: 18:30 PM
Local: room B402
O evento não necessita de inscrição prévia.
Para mais informações: qtdei@dei.isep.ipp.pt
Organização: This webinar is organized by QTDEI, in collaboration with the Master in Engineering for Critical Computing Systems (MESCC) of the Institute of Engineering of Porto (ISEP).